Smash VHDL and Verilog/SystemVerilog bugs on the fly!

Linty HDL Designer will help you boost reliability, enhance security and ensure maintainability of your HDL code.

Checking Code Quality in Real-time

Linty HDL Designer checks over 350 rules in real-time on your HDL (VHDL, Verilog/SystemVerilog and Tcl) code.

Actionable Reports

Linty HDL Designer provides actionable reports and dynamic graphs to get a comprehensive understanding of the design and pinpoint issues. Among others, they cover design hierarchy, clock domain crossings (CDC), reset domain crossings ( RDC), finite state machines (FSM) or combinational loops.

Continuous Integration

Linty HDL Designer is the first component of the Linty code quality tool chain. Check the Connected Mode section and Linty Services website to implement a powerful continuous integration pipeline for your HDL code, to ensure that every piece of code you write is bug-free, secure and highly maintainable.

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Installation and Configuration

Prerequisites

Linty HDL Designer is built upon SonarLint. If SonarLint is already installed, it must be removed before installing Linty HDL Designer.

Free Version

The free version requires no configuration, and the following rules will be checked automatically as soon as you start coding VHDL (.vhdl or .vhd files), Verilog/SystemVerilog (.v or .sv files), or Tcl (.tcl files):

• VHDL (32 rules)
• Verilog/SystemVerilog (153 rules)
• HDL (rules applying to both VHDL and Verilog code) (4 rules)
• Tcl (9 rules)

Issues are displayed in the PROBLEMS panel.

Paid Version

If you're happy with the free version, you're welcome to request a trial license for the paid version to be able to:

• Check hundreds of additional rules including clock domain crossings (CDC), reset domain crossings (RDC), finite state machines (FSM), latches, combinational loops and many more.
• Select and customize rules that should apply to your IP / project
• Deploy Linty in your continuous integration to get features like:
  • Pull/Merge request decoration with issues in GitHub, GitLab, Bitbucket, etc.
  • Blocking merges if quality requirements are not met.

Full list of available rules:

• VHDL
• Verilog
• HDL
• Tcl

The only configuration required is to link your VS Code workspace to your project on the Linty platform. Once linked, quality profiles, exclusions and any other pieces of configuration will be automatically applied in VS Code.

Additional Extensions

To fully benefit from all features, we recommend installing the following powerful extensions, you can install the Linty HDL Designer Extension Pack which contains all these extensions:

	Extension	Description
	Linty Graph Visualization	To visualize and navigate through graphs and diagrams
	TerosHDL	Syntax highlighting, go to definition, etc. for VHDL and Verilog

Usage

Connected Mode (Paid Version)

Linty HDL Designer can connect to Linty to synchronize information on your project. By linking your VS Code workspace to the corresponding project in Linty, you will benefit from:

• Issue detection based on the same quality profile (set of rules) you've configured in Linty.
• Exclusions being taken into account.
• Issues marked as Accept or False positive in Linty being removed from the VS Code PROBLEMS panel.
• And many more benefits.

Here are the simple steps to connect your VS Code workspace to your Linty project:

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Detailed Rule Description (Free and Paid Version)

For each issue, you can access its associated detailed rule description.

Focus on New Code (Paid Version)

You can either view all issues or focus solely on issues in new code. To switch between these modes, click on Linty HDL Designer focus in the Status bar.

Open in IDE (Paid Version)

Some rules, on Clock Domain Crossings (CDC) or combinational loops cannot be checked in real-time because they require processing time. Therefore, these issues will not appear in the PROBLEMS panel.

However, you can view these issues from the Linty web interface and then navigate to VS Code by clicking the Open in IDE button. VS Code will open the correct file at the precise location, allowing you to start investigating the issue. A panel with the rule description is also opened. For issues with multiple secondary locations, you can browse those locations through the LINTY HDL DESIGNER ISSUE LOCATIONS view.

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Reports (Paid Version)

Run Local Analysis

Before you can browse reports, you must first run a local Linty analysis by pressing Ctrl + Shift + P and then selecting Linty HDL Designer: Run Local Analysis. Perform a local analysis each time you wish to synchronize reports with the current state of your code.

Prior to your first analysis, you need to configure the following properties:

• tabbyCadLicense: The path to your Tabby CAD license file.
• scannerVersion: The version of the lintyservices:linty-scanner Docker image to use.
• scannerCache (optional but strongly recommended for faster analyses): The path to your Linty scanner cache directory. Ensure this directory exists.

Go to Extension Setting > Linty: Local Analysis:

And edit in settings.json:

Available Reports

• Design Hierarchy
• Clock Domains
• Reset Domains
• Clock Domain Crossings (CDC)
• Reset Domain Crossings (RDC)
• Finite State Machines (FSM)
• Combinational loops

To facilitate your investigation of issues, these reports include diagrams, graphs, direct links to source code and more.

To open the report summary: Ctrl + Shift + P + Linty HDL Designer: Open Summary Report.

For direct access to a specific report:

• Design Hierarchy: Ctrl + Shift + P + Linty HDL Designer: Open Design Hierarchy Report
• Clock Domains: Ctrl + Shift + P + Linty HDL Designer: Open Clock Domains Report
• Reset Domains: Ctrl + Shift + P + Linty HDL Designer: Open Reset Domains Report
• CDC: Ctrl + Shift + P + Linty HDL Designer: Open CDC Report
• RDC: Ctrl + Shift + P + Linty HDL Designer: Open RDC Report
• FSM: Ctrl + Shift + P + Linty HDL Designer: Open FSM Report
• Combinational loops: Ctrl + Shift + P + + Linty HDL Designer: Open Combinational Loops Report

Report Rendering

For optimal rendering of reports, ensure to load the Linty CSS. Press Ctrl + Shift + P and select Preferences: Open Settings (UI), then go to Markdown: Styles, and add an item with the value: .linty/report/style.css

All Commands

All commands are accessible by pressing Ctrl + Shift + P and then selecting Linty HDL Designer....

Project Sample

For an overview of all features, please, explore our project samples:

• VHDL
• Verilog: Review LINTY-README.md file

Debug

In some environments, restarting VS Code may be necessary to activate all features.

Please allow some time after setting up connected mode, as synchronization with your Linty platform might take a while, depending on your network connection.

If issues persist, gather debug information by configuring analyzer logs to appear in the Linty HDL Designer output by adjusting the following extension settings:

• 
• Ctrl + Shift + P + Linty HDL Designer: Enable Verbose Logging

The, display log output by pressing Ctrl + Shift + P and selecting Linty HDL Designer: Show Log Output

Compatibility Matrix for Linty Toolbox Components