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Chip Area View

Chip Area View

wa9035148

| (0) | Free
View Synopsys DC report_area -hierarchical output as an interactive treemap or list
Installation
Launch VS Code Quick Open (Ctrl+P), paste the following command, and press enter.
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Chip Area View

Visualize Synopsys DC report_area -hierarchical output as an interactive treemap or list directly in VS Code.

screenshot

What it does

Chip design reports (*.rpt) are usually long text files that show area breakdowns by module. This extension renders them as:

  • A treemap — squares sized by area, click to drill down (good for spotting hot modules visually)
  • A list — expandable/collapsible table with Module / Area / % of parent / Cells (good for reading exact numbers)

For comparing two versions (e.g. baseline vs. after a code change), it has a compare mode with a diff column showing the % change per module (red = grew, green = shrunk).

How to use

  1. Right-click any .rpt file in the explorer
  2. Choose Open With → Chip Area View
  3. The file opens in a treemap view
  4. Click any module to drill in; use ↑ Up (or Esc) to go back

To compare two reports:

  • Click "Compare with another file" in the topbar to enter compare mode
  • Load the baseline in side A, the second report in side B
  • Switch to List view to see the diff column

Install

Search "Chip Area View" in the VS Code Extensions panel, or:

code --install-extension wa9035148.vscode-chip-area

Features

  • Treemap view — click-to-drill hierarchical squares
  • List view — expandable/collapsible table
  • Compare mode — side-by-side with diff column
  • 7 color palettes — Viridis, Plasma, Inferno, Warm, YlOrRd, RdYlGn, RdGn
  • Search — find modules by name
  • Export PNG — save the current view as an image
  • Browser mode — also works as a standalone HTML file (no VS Code needed); see the GitHub repo

Privacy

All processing happens locally. The extension reads your .rpt file and renders it inside VS Code. Nothing is sent to any server.

Known limitations

  • Only the DC report_area -hierarchical format is supported. Other .rpt files (DC timing reports, simulation logs, etc.) will show a "No hierarchical section found" error — open them as text instead.
  • The viewer expects a hierarchical section like:
    Module / Hierarchy               Cell Count    Cell Area
    ----------------------------------  -----------  ----------
    soc_top                              123456  1234567.12
      soc_top/cpu_sub                     45678   567890.12
    
    See the sample report for a working example.

Support

  • Source & issues
  • DC report_area documentation (Synopsys SolvNet)

License

MIT

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