EDA Transaction ExtensionThis extension for the impulse framework enables import, analysis, and visualization of both transaction-level and pin-level data from Electronic Design Automation (EDA) simulations. It supports engineers and verification specialists working with SystemC TLM, protocol-level, and pin-level flows including AXI, ACE, CHI, OCP, and custom protocols. About impulseimpulse is a modular, open-source framework for handling signal and measurement data from diverse sources. It provides infrastructure for reading, writing, analyzing, and visualizing signals, supporting both simple and highly structured data. Its extensible architecture allows developers to add support for new data formats by implementing custom readers and writers. About EDAElectronic Design Automation (EDA) refers to software tools for designing, simulating, and verifying electronic systems such as integrated circuits, FPGAs, and printed circuit boards. Modern EDA tools generate not only waveform data but also transaction-level and pin-level logs and traces. Transaction-level data captures high-level communication, protocol events, and relationships between operations; pin-level data records signal activity and protocol handshakes at the interface level. This extension enables importing, analyzing, and visualizing both types of simulation data. OverviewThe EDA Transaction Extension is organized into three main categories of functional blocks:
Each functional block is documented in detail—see the sections below and linked documentation for complete descriptions and usage information. ReadersReaders are responsible for importing transaction data from various file formats and sources. They parse simulation outputs and convert them into impulse's internal signal representation for further analysis and visualization. SCV ReaderStatus: Beta Parses SystemC Verification (SCV) transaction logs in text format (.scv, .txlog). Extracts transaction streams, generators, events, attributes, and relations from SystemC TLM simulations. Supports hierarchical organization, filtering by stream/generator/attribute patterns, and efficient parsing of large log files. Key Features:
FTR ReaderStatus: Beta Imports Fast Transaction Recording (FTR) binary files, optimized for large, compressed datasets. Supports CBOR-encoded streams with LZ4 compression, providing efficient random access to transaction data. Ideal for high-performance simulation outputs requiring fast loading and minimal memory footprint. Key Features:
MetricsMetrics blocks compute and visualize statistical information about protocol transactions. They aggregate data from transaction analyzers to provide insights into system performance and behavior. Transaction MetricsStatus: Experimental Aggregates bandwidth, latency, throughput, and pending transaction counts from various Transaction Analyzers. Operates independently of protocol specifics, supporting any analyzer that produces transaction signals. Generates a unified statistics signal with detailed performance metrics for comparison and analysis. Key Features:
Generated Metrics:
AnalyzersAnalyzers decode protocol signals or transaction-level data to reconstruct and analyze transactions. They are available for both pin-level (hardware signal) analysis and transaction-level modeling (TLM) data. Pin-Level AnalyzersPin-level analyzers process hardware signals directly, reconstructing protocol transactions from individual signal transitions and handshakes. AXI AnalyzerStatus: Beta Pin-level analyzer for AXI3/AXI4 protocols. Decodes address, data, and response channels to reconstruct read and write transactions. Detects bursts, tracks out-of-order transactions using protocol IDs, and verifies handshake sequences. Extracts protocol attributes (burst type, size, cache, protection) and generates performance metrics. Supported Protocols: AXI3, AXI4 Key Features:
ACE AnalyzerStatus: Experimental Extends AXI4 analysis with ACE/ACE-Lite coherency support. Handles shareability domains, memory barriers, and snoop transactions for cache-coherent systems. Decodes coherency-specific signals including snoop channels (AC/CR/CD) and barrier acknowledgements. Supported Protocols: AXI4, ACE-Lite, ACE Key Features:
CHI AnalyzerStatus: Experimental Decodes AMBA CHI (Coherent Hub Interface) protocol flits to reconstruct cache-coherent transactions. Supports multi-channel flit parsing across Request (REQ), Response (RSP), Data (DAT), and Snoop (SNP) channels. Handles advanced CHI features including quality of service, atomic operations, and distributed virtual memory. Supported Protocols: CHI Issue B, CHI Issue E, CHI Issue H Key Features:
OCP AnalyzerStatus: Experimental Pin-level analyzer for Open Core Protocol (OCP). Supports various command types (RD, WR, RDEX, RDL, WRNP, WRC, BCST), burst modes, and threading. Handles 2D block transfers and request/data/response phase correlation using thread IDs. Supported Protocol: OCP 2.x Key Features:
Transaction-Level AnalyzersTransaction-level analyzers process TLM-2.0 transaction data, correlating phases and extracting protocol events. TLM Phase AnalyzerStatus: Experimental Processes SystemC TLM-2.0 transaction-level data by identifying and correlating transaction phases (BEGIN_REQ, END_REQ, BEGIN_RESP, END_RESP). Supports partial transactions, delay compensation, and bidirectional protocols with return path phases. Automatically detects protocol extensions (AXI3/AXI4/ACE/CHI) and extracts protocol-specific attributes. Key Features:
Quick Start1. Reading FilesTransaction Logs (SCV/FTR):
Waveform Files (VCD, FSDB, FST):
2. Adding Transaction MetricsGenerate unified performance statistics across protocol sources:
3. Pin-Level Analyzers (ACE/AXI/CHI/OCP)Reconstruct transactions from hardware signals:
4. TLM Phase AnalyzerProcess SystemC TLM-2.0 transaction data:
LicenseOur guiding principle for this and all subsequent versions is:
DocumentationEnter https://toem.io/resources/ for more information about impulse. Status Summary
Contributions and feedback are welcome as this extension continues to evolve. |