Verilog-A Language Support for VSCode

A Visual Studio Code extension, which provides support for the Verilog-A language.

This extension is still in development. Any recommendations are greatly appreaciated.

Features

Compile with OpenVAF

You need OpenVAF installed on your system for this.

Hover

Go to reference / definition

Other minor features

• Syntax highlighting

• Some snippets

Preface

As someone who doesn't program in Verilog-A at all (or anything similar), I have tried my best to grasp the syntax and rules. Still, I most likely missed some things (or common practices), so if you see something that is not aligned with standards or doesn't work the way it should, please let me know either by issues here or by email!

If you want to contribute please fork the repository, clone it and make changes, then create a PR.

Release Notes

See the changelog for more details

Third-Party Code

This project is based on eirikpre's SystemVerilog VSCode Extension, which is licensed under the MIT License. See the licenses folder for more details.

Future/Issues

• Better hover information.
• Include a Completion Provider.
• Rewrite some providers more efficiently.
• Syntax highlighting might need refinement.
• Old references don't get cleared immediately.