IDXcelium

This extension aims to aid in (System)Verilog development by providing an easy-to-run interface to the Cadence® XCELIUM product suite.

Prerequisite on your machine

XCELIUM product suite

The XCELIUM executable xrun must be installed on your machine.

Verible

The extension requires the verible-verilog-ls executable installed on your machine.

On Linux and Windows, the plug-in will try to download the necessary executable (if it's not already available).

Get a binary distribution for your Operating System at https://github.com/chipsalliance/verible/releases

Extension Settings

This extension contributes the following settings:

• idxcelium.verible.path: The path to verible-verilog-ls executable, e.g.: /usr/bin/verible-verilog-ls.
• idxcelium.verible.arguments: Arguments for verible-verilog-ls server.
• idxcelium.build.path: Specify custom path of the build directory.
• idxcelium.xcelium.path: Specify custom path of the XCELIUM install (where the bin/ and tools/ are located).
• idxcelium.xcelium.noWarn: List of string messages to ignore when parsing the log file, e.g.: NOMTDGUI.

Test view

A test is encapsulated in a view. A full yml view is shown below with additional information about the options. The optional parameters are annotated and filled with their default value, unless stated otherwise. Be careful, # counts as a comment in YML, if a # inside of a command or signal is required, it must be properly escaped.

name: example  # identifier for the test, e.g. rtl, synth, pnr, ...
top: example_tb  # module name used as top level for this test, e.g. hello_world_tb

directories:  # (optional)
    build: ${workspaceFolder}/build  # (optional) where to put the build files
    include:  # (optional) list of directories to search for include files
        - ${workspaceFolder}/include

parameters:  # (optional) list of parameter objects as NAME: VALUE, must be integers
    - PARAMETER: 1

defines:  # (optional) list of define objects as NAME: VALUE, the value is optional
    - DEFINE:

files:  # list of all required (System)Verilog files, (shell) wildcards are allowed
    - ${workspaceFolder}/rtl/**.sv
    - ${workspaceFolder}/test/**.sv
    - ${workspaceFolder}/testbench/example_tb.sv

xrun:  # (optional) additional xrun command line options, e.g. -gui to open the gui (not done by default)
    - -gui

simvision:  # (optional) simvision commands, e.g. to probe signals (not done by default)
    - probe -create -shm -all -depth all -packed 4k -unpacked 1024 -memories  # this will probe all signals

signals:  # (optional) list of signals to view in the waveform window, more information below
    - /clk

Both xrun, simvision and signals options also accept a string instead of an array of strings. This allows the user to create their own files to use instead of using the list. This string is allowed to contain ${workspaceFolder} if a relative path is preferred.

signals

The signals options tries to make viewing signals easier. The user can put their own lines here, or he can use custom options:

• waveform add -signals { example_tb.clk }: any simvision command can be put here, additional options (e.g. color) can be specified here.
• add_signal clk: shorthand version of the above, bypasses the need to provide the module name, making reuse easier
• /clk: even shorter version of the one above
• waveform add -cdivider divider: add a divider (normal simvision command)
• ---: shorthand version of the above

To change color or the radix of a waveform, this can currently only be done by storing the added waveform in a variable and changing settings in new lines, e.g.:

signals:
    - set id [add_signal write_buffer]
    - waveform hierarchy expand $id
    - waveform format $id -radix %h
    - waveform format $id -color \#44AA99