68k Counter for VS Code
Displays cycle and size information for 68000, 68020, 68030, 68040 and 68060 assembly source.
Features
Gutter annotations
Provides annotations for each line of code to show:
- Size in bytes
- CPU cycles
- Bus read cycles
- Instruction prefetch cycles (68020/68030)
- Bus write cycles
Click 'Toggle counts' at the top of a file to enable these. These counts live-update as you edit the code.
Calculate totals
Totals cycles and size across a range of lines. Either:
Select some text with count annotations enabled and the totals will be displayed in the status bar at the bottom of the screen.
Call 68kcounter: Count selection from the command palette with some text selected.
Requirements
An extension which provides a 68000 assembly language definition:
Development
Install dependencies at the monorepo root and choose Counter: Extension in Run and Debug. pnpm package:counter creates the VSIX through a staging directory, preserving the Marketplace identity gigabates.68kcounter.
License
MIT; existing attribution notices are preserved.
CPU and cache settings
Set project defaults in .vscode/settings.json:
{
"68kcounter.defaultCpu": "68020",
"68kcounter.cacheModel": "worst"
}
The default CPU is 68000. Supported machine directives in the source override it, including directives before a counted selection. Settings are scoped to the document's workspace folder.
For 68020/68030, choose worst or cache for uncached or cached timings. Run 68kcounter: Toggle cache timing model, or click the counts in the status bar, to switch modes temporarily for the current document. Annotations and selection counts update immediately without changing settings. The override lasts until the document closes or you run 68kcounter: Reset cache timing model to configured default. Other documents keep their own mode. The cache setting has no effect on 68000 timings.
Timings are displayed as clocks(reads/writes) for 68000 and clocks(reads/prefetches/writes) for 68020/68030. Hover over an annotation for the column legend and active cache model.
For 68030, uncached values are the manual's average no-cache estimates with two-clock reads and writes, not absolute worst cases. Instruction overlap, data-cache hits, MMU walks and wait states are not simulated. Supported full-format addressing forms have their own timing costs. See the core timing documentation for coverage.
68040 / 68060
The default CPU setting and source machine directives also support 68040 and 68060. These targets currently provide cached integer reference costs only; the cache toggle does not switch a document containing only these references to an unavailable uncached model.
Hovers identify operand reads/writes (not external bus transfers), and show the 040 address-calculation and execution lead/base fields. Totals are labelled reference sums and keep different timing models separate. They do not predict sequence runtime or 060 instruction pairing. A ? annotation identifies an instruction form without timing coverage, and the status/selection totals indicate incomplete coverage. See the counter timing assumptions and coverage.
