FPGA Error Decoder

Active development: feedback needed. FPGA Error Decoder is improving quickly, and real user feedback directly shapes the next releases. If a diagnostic is unclear, a vendor message is missing, the UX is confusing, or a rule looks wrong, please use Report Issue or UX Feedback from the extension so maintainers can fix it.

Triage long FPGA/EDA logs into clear VS Code Problems, a concise report, and practical next steps.

Use it when synthesis, lint, simulation, place-and-route, timing, or programming output is too noisy to scan by hand.

What It Does

• Decodes .log, .rpt, .jou, and text output from common FPGA/EDA tools.
• Shows matched errors and warnings in VS Code Problems.
• Opens a report with evidence, likely cause, confidence, limitations, and suggested next steps.
• Extracts parse-only timing clues such as WNS/slack, clocks, path groups, unconstrained paths, and critical path rows.
• Scans local project context for top-module hints, source-order issues, missing includes, constraints, generated IP refs, and build-flow hints.
• Keeps private data local by default.

Quick Start

1. Open an FPGA project or a build log in VS Code.
2. Run FPGA Error Decoder: Decode Current Log.
3. Review diagnostics in Problems.
4. Open the report for evidence, suggested next steps, timing summary, and local evidence checks.

You can also decode selected text, clipboard text, external log payloads, or a configured VS Code Task result.

Main Commands

• Decode Current Log
• Decode Selection
• Decode Clipboard Text
• Run Task and Decode
• Open Report
• Analyze FPGA Project Context
• Preview fpga.chat Payload
• Ask fpga.chat
• Send Feedback to fpga.chat
• Report Issue or UX Feedback

Supported Signals

Starter/classifier rules cover Yosys, Verilator, GHDL, Icarus Verilog, nextpnr, openFPGALoader, and vendor-style Vivado/Quartus/Gowin/Lattice messages.

The extension is best used as a triage assistant: it points to likely causes and local evidence, but it does not replace vendor documentation, timing closure, CDC/RDC analysis, formal verification, or signoff.

Privacy

• Logs are parsed locally by default.
• Reports render redacted evidence, not raw private logs.
• Paths, usernames, hostnames, emails, tokens, private IPs, license paths, and internal URLs are redacted from shared payloads.
• fpga.chat is optional and disabled by default.
• Redacted fpga.chat requests require preview and confirmation.
• Raw-log online warnings require explicit trusted-workspace consent and can be disabled later.

For Rule Authors And Contributors

npm install
npm run test:all
npm run package

Useful docs:

• Security
• Privacy
• Rule Pack Guide
• fpga.chat API Contract
• VS Code Tasks Guide
• UX Audit and Test Plan
• Русская инструкция