A board-first VS Code extension for AMD/Xilinx FPGA projects. It keeps board facts and project bindings separate, then generates constraints/board.xdc without touching user.xdc.
V0.1 workflow
Run FPGA Board: Select Board and select a board package.
Run FPGA Board: Select Top Module (or use the active Verilog file).
In Constraints, assign each RTL port to a board resource.
Run Generate board.xdc and Validate Constraints.
The project mapping lives in .fpga-board.json. Board packages are JSON files under boards/ or paths configured in fpgaBoard.databasePaths.
When a board is missing
Run FPGA Board: Create Missing Board Data Checklist. It creates .fpga-board-research.md, a copy-ready prompt/checklist for finding vendor-backed information (revision, FPGA part, official XDC/pin table, schematic, manuals, and source locations). Do not infer package pins from photographs or an unverified web page.