Digital Systems Snips

Offline SystemVerilog snippets and commented study scaffolds for digital systems / FPGA practice.

Main snippets

• dff4 — 4-bit D flip-flop/register with async reset and enable
• ring — 8-bit one-hot ring counter
• clkdiv — clock divider/free-running counter
• alu — simple 4-bit ALU
• ssdec — seven-segment decoder
• topwire — practical-style wiring block for inside top
• topinst / fullprac — full-file commented study scaffold

Comment help

In a Verilog/SystemVerilog file, type:

// help

Then trigger suggestions with Ctrl+Space / Cmd+Space and pick a guide block.

Note

This extension is intended as a learning and productivity tool. During exams or practicals, use templates/snippets only when your course rules allow them.

v0.0.4 additions

Added BCD arithmetic snippets: fa, fa4, bcdadd1r, bcdadd4, bcd9comp1, bcdaddsub4, and bcdpack.