Open-source FPGA development toolchain for VS Code
Build, simulate, and program FPGA designs without leaving the editor.
SynthesisDeck brings a complete open-source hardware workflow to VS Code — from writing HDL to flashing your board.
Open the Welcome page — Ctrl+Shift+P → SynthesisDeck: Welcome
System diagnostics will check Docker, toolchain image, and programmer status
Click New Project, pick a board, choose a template
Hit Build & Program to synthesize and flash
Workspace Marker
SynthesisDeck activates when it finds a .synthesisdeck/ directory alongside your fpga-project.toml. New projects get this automatically; for existing projects the extension will prompt you to migrate.
Project Config
[project]
name = "my_project"
[target]
family = "ice40"
device = "hx1k"
package = "tq144"
board = "icestick"
[sources]
top = "top"
vhdl = ["src/*.vhdl"]
Commands
Command
Description
Build Project
Run full synthesis pipeline
Build & Program
Build then flash the board
Build Stage…
Run a specific pipeline stage
Program Board
Flash bitstream to connected board
Run Simulation
Run GHDL testbench simulation
Clean Build
Remove build artifacts
New Project
Create project from template
Generate PLL
Generate PLL config (iCE40)
Select Board
Change target board
Detect Board
Detect USB-connected FPGA boards
Pull Docker Image
Pull / update toolchain image
Open Project Config
Open fpga-project.toml
Show Project Info
Display project diagnostics
Setup
Run guided setup
Welcome
Open the welcome page
All commands are available via Ctrl+Shift+P (prefix: SynthesisDeck).
Settings
Setting
Default
Description
synthesisDeck.useDocker
true
Use Docker container for toolchain
synthesisDeck.docker.registry
kaanergun/synthesis-deck
Docker image name
synthesisDeck.docker.tag
latest
Docker image tag
synthesisDeck.programmer.tool
auto
Programmer (auto / iceprog / openFPGALoader)
synthesisDeck.programmer.path
""
Custom programmer binary path
synthesisDeck.autoSaveBeforeBuild
true
Auto-save files before building
synthesisDeck.showBuildNotifications
true
Show build completion notifications
synthesisDeck.usb.autoDetect
true
Auto-detect connected boards via USB
synthesisDeck.usb.pollInterval
5000
USB detection poll interval (ms)
synthesisDeck.advancedMode
false
Show verbose output in the Output panel
Diagnostics
Built-in problem matchers surface errors directly in the Problems panel:
