vhdl-hierarchy READMEThis extension analyzes the workspace for VHDL, Qsys and _hw.tcl files to generate an architecture outline for easy navigation. FeaturesCreates an outline. Can create hierarchy image using graphviz. requires dot command to be in path. Extension SettingsThis extension contributes the following settings:
Known IssuesNo error reporting and fragile parsing of VHDL, Qsys and _hw.tcl files. No support for libraries. stil outputting debug information. Release Notes0.0.2Added hierarchy image generator using graphviz dot. 0.0.1Initial release. |