Lightspeed HDL
A Visual Studio Code extension providing fast, enhanced support for Hardware Description Languages (HDL) and FPGA development tools.
This is still very much a work in progress, so be kind and patient as I add more and more features.
Features
Syntax highlighting for:
- SystemVerilog (.sv, .svh)
- TL-Verilog (.tlv)
- Verilog (.v, .vh)
- VHDL (.vhd, .vhdl)
- XDC (Xilinx Design Constraints)
- LDC (Lattice Design Constraints)
- Tcl (Tool Command Language)
- Log files (.log)
- Bluespec BH (.bs, .bsv)
- PDC (Microchip Design Constraints)
Hover information for VHDL, Verilog, and SystemVerilog
Auto-complete glossary
- Full glossary of all available auto-complete
- Language-specific auto-complete views
- Dark and light theme support
Formatter (VHDL, Verilog, SystemVerilog)
- Format selection or full document
- VHDL options aligned with terosHDL (keyword/name case, newlines, port/generic alignment); configurable in settings
Commands
- Convert between decimal, binary, hexadecimal, and octal
- Invert, shift, rotate & 2's complement for the above number types
- MHz ↔ ns conversion; value range for bit width; bits required
- Insert number sequences in decimal, binary, hexadecimal, and octal
- Basic calculator and calculator reference
Viewers (XCI, COE, CSV can be enabled/disabled in HDL Settings):
- IPXACT/IP viewer (.xci) – parameters as table with search
- Memory init viewer (.coe) – memory as table
- CSV viewer (.csv) – data as table
- BIT file viewer (.bit) – read-only bitstream info
Enjoy!
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