A Visual Studio extension that supports SystemVerilog language. This extension implements SystemVerilog language parser to understand design and testbench to provide context-aware language services.
Find a Youtube video that demonstrates using this extension.
Supported features are
Supported simulation tools are
This extension provides two projects templates
1. File list management
The parser within this extension seeks out two specific file list files: "vcode.f" and "tb_vcode.f." If they are present, the parser will process these file lists before opening the first Verilog source file. All files defined in the two file lists will be included in the same compilation unit scope, allowing for more precise symbol checking. If the file lists are not found, each SystemVerilog file will have its own separate compilation unit.
2. For Verilator Users
This extension requires that Verilator version 5.007 or higher be installed on the Window Sub-system Linux (WSL) platform. For installation instructions, please refer to the official Verilator guide.
Additionally, GCC version 10 or later is required. WSL users can install gcc-10 with following command.
sudo apt-get install gcc-10
To enable Verilator to use gcc-10 instead of default gcc, modify /usr/local/share/verilator/include/verilated.mk as follows.
AR = ar
CXX = g++-10
LINK = g++-10
3. For Questa Users
To utilize this extension, the directory path of Questa must be registered in the system's environmental variable "Path," allowing Questa's executables to be easily accessed through the command line script.